ATtiny1634_Datasheet(1).pdf

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8-bit Atmel tinyAVR Microcontroller with

16K Bytes In-System Programmable Flash

ATtiny1634

Features

•

High Performance, Low Power AVR

8-bit Microcontroller

•

Advanced RISC Architecture

– 125 Powerful Instructions – Most Single Clock Cycle Execution

– 32 x 8 General Purpose Working Registers

– Fully Static Operation

High Endurance, Non-volatile Memory Segments

– 16K Bytes of In-System, Self-Programmable Flash Program Memory

• Endurance: 10,000 Write/Erase Cycles

– 256 Bytes of In-System Programmable EEPROM

• Endurance: 100,000 Write/Erase Cycles

– 1K Byte of Internal SRAM

– Data retention: 20 years at 85C / 100 years at 25C

– Programming Lock for Self-Programming Flash & EEPROM Data Security

Peripheral Features

– Dedicated Hardware and QTouch

Library Support for Capacitive Touch Sensing

– One 8-bit and One 16-bit Timer/Counter with Two PWM Channels, Each

– 12-channel, 10-bit ADC

– Programmable Ultra Low Power Watchdog Timer

– On-chip Analog Comparator

– Two Full Duplex USARTs with Start Frame Detection

– Universal Serial Interface

– Slave I

C Serial Interface

Special Microcontroller Features

– debugWIRE On-chip Debug System

– In-System Programmable via SPI Port

– Internal and External Interrupt Sources

• Pin Change Interrupt on 18 Pins

– Low Power Idle, ADC Noise Reduction, Standby and Power-down Modes

– Enhanced Power-on Reset Circuit

– Programmable Brown-out Detection Circuit with Supply Voltage Sampling

– Calibrated 8MHz Oscillator with Temperature Calibration Option

– Calibrated 32kHz Ultra Low Power Oscillator

– On-chip Temperature Sensor

I/O and Packages

– 18 Programmable I/O Lines

– 20-pad QFN/MLF, and 20-pin SOIC

Operating Voltage:

– 1.8 – 5.5V

Speed Grade:

– 0 – 2MHz @ 1.8 – 5.5V

– 0 – 8MHz @ 2.7 – 5.5V

– 0 – 12MHz @ 4.5 – 5.5V

Temperature Range: -40C to +105C

Low Power Consumption

– Active Mode: 0.2mA at 1.8V and 1MHz

– Idle Mode: 30µA at 1.8V and 1MHz

– Power-Down Mode (WDT Enabled): 1µA at 1.8V

– Power-Down Mode (WDT Disabled): 100nA at 1.8V

•

Atmel-8303H-AVR-ATtiny1634-Datasheet–02/2014

1. Pin Configurations

Figure 1-1.

Pinout of ATtiny1634

SOIC

(PCINT8/TXD0/ADC5) PB0

(PCINT7/RXD0/ADC4) PA7

(PCINT6/OC1B/ADC3) PA6

(PCINT5/OC0B/ADC2) PA5

(PCINT4/T0/ADC1) PA4

(PCINT3/T1/SNS/ADC0) PA3

(PCINT2/AIN1) PA2

(PCINT1/AIN0) PA1

(PCINT0/AREF) PA0

GND

PB1 (ADC6/DI/SDA/RXD1/PCINT9)

PB2 (ADC7/DO/TXD1/PCINT10)

PB3 (ADC8/OC1A/PCINT11)

PC0 (ADC9/OC0A/XCK0/PCINT12)

PC1 (ADC10/ICP1/SCL/USCK/XCK1/PCINT13)

PC2 (ADC11/CLKO/INT0/PCINT14)

PC3 (RESET/dW/PCINT15)

PC4 (XTAL2/PCINT16)

PC5 (XTAL1/CLKI/PCINT17)

VCC

QFN/MLF

PA7 (PCINT7/RXD0/ADC4)

PB0 (PCINT8/TXD0/ADC5)

PB1 (ADC6/DI/SDA/RXD1/PCINT9)

PB2 (ADC7/DO/TXD1/PCINT10)

PB3 (ADC8/OC1A/PCINT11)

NOTE

Bottom pad should be

soldered to ground.

(PCINT1/AIN0) PA1

(PCINT0/AREF) PA0

GND

VCC

PC5 (XTAL1/CLKI/PCINT17)

(PCINT6/OC1B/ADC3) PA6

(PCINT5/OC0B/ADC2) PA5

(PCINT4/T0/ADC1) PA4

(PCINT3/T1/SNS/ADC0) PA3

(PCINT2/AIN1) PA2

PC0 (ADC9/OC0A/XCK0/PCINT12)

PC1 (ADC10/ICP1/SCL/USCK/XCK1/PCINT13)

PC2 (ADC11/CLKO/INT0/PCINT14)

PC3 (RESET/dW/PCINT15)

PC4 (XTAL2/PCINT16)

ATtiny1634 [DATASHEET]

Atmel-8303H-AVR-ATtiny1634-Datasheet_02/2014

1.1

1.1.1

Pin Descriptions

VCC

Supply voltage.

GND

Ground.

XTAL1

Input to the inverting amplifier of the oscillator and the internal clock circuit. This is an alternative pin configuration

of PC5.

XTAL2

Output from the inverting amplifier of the oscillator. Alternative pin configuration of PC4.

RESET

Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock

is not running and provided the reset pin has not been disabled. The minimum pulse length is given in

Table 24-5

on page 231.

Shorter pulses are not guaranteed to generate a reset.

The reset pin can also be used as a (weak) I/O pin.

1.1.2

1.1.3

1.1.4

1.1.5

1.1.6

Port A (PA7:PA0)

This is an 8-bit, bi-directional I/O port with internal pull-up resistors (selected for each bit). Output buffers have the

following drive characteristics:

• PA7, PA4:PA0: Symmetrical, with standard sink and source capability

• PA6, PA5: Asymmetrical, with high sink and standard source capability

As inputs, port pins that are externally pulled low will source current provided that pull-up resistors are activated.

Port pins are tri-stated when a reset condition becomes active, even if the clock is not running.

This port has alternate pin functions to serve special features of the device. See

“Alternate Functions of Port A” on

page 62.

1.1.7

Port B (PB3:PB0)

This is a 4-bit, bi-directional I/O port with internal pull-up resistors (selected for each bit).Output buffers have the

following drive characteristics:

• PB3: Asymmetrical, with high sink and standard source capability

• PB2:PB0: Symmetrical, with standard sink and source capability

As inputs, port pins that are externally pulled low will source current provided that pull-up resistors are activated.

Port pins are tri-stated when a reset condition becomes active, even if the clock is not running.

This port has alternate pin functions to serve special features of the device. See

“Alternate Functions of Port B” on

page 65.

1.1.8

Port C (PC5:PC0)

This is a 6-bit, bi-directional I/O port with internal pull-up resistors (selected for each bit). Output buffers have the

following drive characteristics:

ATtiny1634 [DATASHEET]

Atmel-8303H-AVR-ATtiny1634-Datasheet_02/2014

• PC5:PC1: Symmetrical, with standard sink and source capability

• PC0: Asymmetrical, with high sink and standard source capability

As inputs, port pins that are externally pulled low will source current provided that pull-up resistors are activated.

Port pins are tri-stated when a reset condition becomes active, even if the clock is not running.

This port has alternate pin functions to serve special features of the device. See

“Alternate Functions of Port C” on

page 67.

2. Overview

ATtiny1634 is a low-power CMOS 8-bit microcontrollers based on the AVR enhanced RISC architecture. By exe-

cuting powerful instructions in a single clock cycle, the ATtiny1634 achieves throughputs approaching 1 MIPS per

MHz allowing the system designer to optimize power consumption versus processing speed.

Figure 2-1.

Block Diagram

RESET

GND

POWER

SUPERVISION:

POR

BOD

RESET

ON-CHIP

DEBUGGER

ISP

INTERFACE

DEBUG

INTERFACE

EEPROM

8-BIT

TIMER/COUNTER

16-BIT

TIMER/COUNTER

CALIBRATED ULP

OSCILLATOR

CALIBRATED

OSCILLATOR

USART0

USI

WATCHDOG

TIMER

TIMING AND

CONTROL

USART1

TWO-WIRE

INTERFACE

PROGRAM

MEMORY

(FLASH)

DATA

MEMORY

(SRAM)

TEMPERATURE

SENSOR

VOLTAGE

REFERENCE

ANALOG

COMPARATOR

MULTIPLEXER

CPU CORE

8-BIT DATA BUS

TOUCH

SENSING

ADC

PORT A

PORT B

PORT C

PA[7:0]

PB[3:0]

PC[5:0]

ATtiny1634 [DATASHEET]

Atmel-8303H-AVR-ATtiny1634-Datasheet_02/2014

The AVR core combines a rich instruction set with 32 general purpose working registers. All 32 registers are

directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in a single

instruction, executed in one clock cycle. The resulting architecture is compact and code efficient while achieving

throughputs up to ten times faster than conventional CISC microcontrollers.

ATtiny1634 provides the following features:

• 16K bytes of in-system programmable Flash

• 1K bytes of SRAM data memory

• 256 bytes of EEPROM data memory

• 18 general purpose I/O lines

• 32 general purpose working registers

• An 8-bit timer/counter with two PWM channels

• A16-bit timer/counter with two PWM channels

• Internal and external interrupts

• A 10-bit ADC with 5 internal and 12 external channels

• An ultra-low power, programmable watchdog timer with internal oscillator

• Two programmable USART’s with start frame detection

• A slave Two-Wire Interface (TWI)

• A Universal Serial Interface (USI) with start condition detector

• A calibrated 8MHz oscillator

• A calibrated 32kHz, ultra low power oscillator

• Four software selectable power saving modes.

The device includes the following modes for saving power:

• Idle mode: stops the CPU while allowing the timer/counter, ADC, analog comparator, SPI, TWI, and interrupt

system to continue functioning

• ADC Noise Reduction mode: minimizes switching noise during ADC conversions by stopping the CPU and all

I/O modules except the ADC

• Power-down mode: registers keep their contents and all chip functions are disabled until the next interrupt or

hardware reset

• Standby mode: the oscillator is running while the rest of the device is sleeping, allowing very fast start-up

combined with low power consumption.

The device is manufactured using Atmel’s high density non-volatile memory technology. The Flash program mem-

ory can be re-programmed in-system through a serial interface, by a conventional non-volatile memory

programmer or by an on-chip boot code, running on the AVR core.

The ATtiny1634 AVR is supported by a full suite of program and system development tools including: C compilers,

macro assemblers, program debugger/simulators and evaluation kits.

ATtiny1634 [DATASHEET]

Atmel-8303H-AVR-ATtiny1634-Datasheet_02/2014

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