ht27c512.pdf

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HT27C512
OTP CMOS 64K
×
8-Bit EPROM
Features
Operating voltage: +5.0V
Programming voltage
V
PP
=12.2V
±
0.2V
V
CC
=5.8V
±
0.2V
High-reliability CMOS technology
Latch-up immunity to 100mA from -1.0V to
V
CC
+1.0V
CMOS and TTL compatible I/O
Low power consumption
Active: 30mA max.
Standby: 1
µ
A typ.
64K
×
8-bit organization
Fast read access time: 70ns, 90ns and 120ns
Fast programming algorithm
Programming time 75
µ
s typ.
Two line control (OE & CE)
Standard product identification code
Package type
28-pin DIP/SOP
32-pin PLCC
Commercial temperature range
(0
°
C to +70
°
C)
General Description
The HT27C512 chip family is a low-power,
512K bit, +5V electrically one-time programma-
ble (OTP) read-only memories (EPROM). Or-
ganized into 64K words with 8 bits per word, it
features a fast single address location program-
ming, typically at 75
µ
s per byte. Any byte can
be accessed in less than 70ns/90ns with respect
to Spec. This eliminates the need for WAIT
states in high-performance microprocessor sys-
tems. The HT27C512 has separate Output En-
able (OE) and Chip Enable (CE) controls which
eliminate bus contention issues.
Block Diagram
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HT27C512
Pin Assignment
Pin Description
Pin Name
A0~A15
DQ0~DQ7
CE
OE/VPP
NC
VCC
VSS
I/O/C/P
I
I/O
C
C/P
I
I
Address inputs
Data inputs/outputs
Chip enable
Description
Output enable/program voltage supply
No connection
Positve power supply
Negative power supply
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HT27C512
Absolute Maximum Ratings
Operation Temperature Commercial ...................................................................................0
°
C to +70
°
C
Storage Temperature......................................................................................................... –65
°
C to 125
°
C
Applied VCC Voltage with Respect to VSS ........................................................................ –0.6V to 7.0V
Applied Voltage on Input Pin with Respect to VSS........................................................... –0.6V to 7.0V
Applied Voltage on Output Pin with Respect to VSS............................................... –0.6V to V
CC
+0.5V
Applied Voltage on A9 Pin with Respect to VSS.............................................................. –0.6V to 13.5V
Applied VPP Voltage with Respect to VSS .......................................................................–0.6V to 13.5V
Applied READ Voltage (Functionality is guaranteed between these limits) ................ +4.5V to +5.5V
Note: These are stress ratings only. Stresses exceeding the range specified under “Absolute Maxi-
mum Ratings” may cause substantial damage to the device. Functional operation of this device
at other conditions beyond those listed in the specification is not implied and prolonged
exposure to extreme conditions may affect device reliability.
D.C. Characteristics
Read operation
Symbol
V
OH
V
OL
V
IH
V
IL
I
LI
I
LO
I
CC
I
SB1
I
SB2
I
PP
Parameter
V
CC
Output High Level
Output Low Level
Input High Level
Input Low Level
Input Leakage Current
Output Leakage Current
VCC Active Current
Standby Current (CMOS)
Standby Current (TTL)
VPP Read/Standby Current
5V
5V
5V
5V
5V
5V
5V
5V
5V
5V
Test Conditions
Conditions
I
OH
=–0.4mA
I
OL
=2.1mA
V
IN
=0 to 5.5V
V
OUT
=0 to 5.5V
CE=V
IL
, f=5MHz,
I
OUT
=0mA
CE=V
CC
±
0.3V
CE=V
IH
CE=OE=V
IL
, V
PP
=V
CC
Min. Typ.
2.4
2.0
–0.3
–5
–10
1.0
Max.
0.45
V
CC
+0.5
0.8
5
10
30
10
1.0
100
Unit
V
V
V
V
µ
A
µ
A
mA
µ
A
mA
µ
A
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HT27C512
Programming operation
Symbol
V
OH
V
OL
V
IH
V
IL
I
LI
V
H
I
CC
I
PP
Parameter
Output High Level
Output Low Level
Input High Level
Input Low Level
Input Load Current
A9 Product ID Voltage
VCC Supply Current
VPP Supply Current
Test Conditions
V
CC
Conditions
Min.
2.4
0.7V
CC
–0.5
11.5
Typ.
Max.
0.45
V
CC
+0.5
0.8
5.0
12.5
40
10
Unit
V
V
V
V
µ
A
5.8V I
OH
=–0.4mA
5.8V I
OL
=2.1mA
5.8V
5.8V
5.8V V
IN
=V
IL
, V
IH
5.8V
5.8V
5.8V CE=V
IL
V
mA
mA
Capacitance
Symbol
C
IN
C
OUT
C
VPP
Parameter
V
CC
Input Capacitance
Output Capacitance
VPP Capacitance
5V
5V
5V
Test Conditions
Conditions
V
IN
=0V
V
OUT
=0V
V
PP
=0V
Min. Typ. Max. Unit
8
8
18
12
12
25
pF
pF
pF
A.C. Characteristics
Read operation
Symbol
t
ACC
t
CE
t
OE
t
DF
Parameter
Address to Output Delay
Chip Enable to Output Delay
Output Enable to Output Delay
CE or OE High to Output
Float, Whichever
Occurred First
Output Hold from Address,
CE or OE, Whichever
Occurred First
Test Conditions
V
CC
5V
5V
5V
5V
–70
–90
Unit
90
90
35
25
ns
ns
ns
ns
Conditions
CE=OE=V
IL
OE=V
IL
CE=V
IL
Min. Max. Min. Max.
70
70
30
25
t
OH
5V
0
0
ns
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HT27C512
Programming operation
Ta=+25
°
C
±
5
°
C
Symbol
t
AS
t
OES
t
OEH
t
DS
t
AH
t
DH
t
DFP
t
PW
t
VCS
t
DV
t
VR
Parameter
Address Setup Time
CE/VPP Setup Time
OE/VPP Hold Time
Data Setup Time
Address Hold Time
Data Hold Time
Output Enable to Output Float
Delay
PGM Program Pulse Width
VCC Setup Time
Data Valid From CE
OE/VPP Recovery Time
Test Conditions
V
CC
5.8V
5.8V
5.8V
5.8V
5.8V
5.8V
5.8V
5.8V
5.8V
5.8V
5.8V
Min. Typ. Max. Unit
2
2
2
2
0
2
0
30
2
2
75
130
105
150
µ
s
µ
s
µ
s
µ
s
µ
s
µ
s
Conditions
ns
µ
s
µ
s
ns
µ
s
Test waveforms and measurements
For -70, -90 devices:
t
R
, t
F
< 20ns (10% to 90%)
Output test load
1.3V
(1N914)
3.3kΩ
Output Pin
C
L
Note: C
L
=100pF including jig capacitance, except for the
-45 devices, where C
L
=30pF.
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6th May ’99
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