slua150.pdf

(285 KB) Pobierz
APPLICATION NOTE
U-144
UNITRODE CORPORATION
APPLICATION NOTE U-144
UCC3806 BiCMOS CURRENT MODE CONTROL IC
By Jack Palczynski
Application Engineer
Power Supply Products
Abstract
Space and cost constraints have forced power supply designs into smaller spaces and demanded more ef-
ficient designs with higher switching frequencies. With the introduction of the UCC3806 BiCMOS current
mode controller, a designer has the advantages of reduced current consumption, power loss and propaga-
tion delays within the IC. The UCC3806 is pin-for-pin compatible with the popular UC3846 and UC3856
controllers. With minimal part changes, this device may be suitable for retrofit into many existing designs
where higher power consumption and propagation delays posed problems in the past. An ideal application
for the UCC3806 is in battery operated equipment where low power consumption is critical to extended op-
eration.
INTRODUCTION
As power supply requirements are demanding
higher switching frequencies and lower power con-
sumption, bipolar PWM IC’s may limit design flexi-
bility. The versatile UC3846 consumes relatively
low power but is slow by today’s standards. The
UC3856 fulfills the high speed requirements but
uses significantly more power to accomplish the
task. Unitrode’s BiCMOS process produces fast,
low power BiCMOS control ICs with the high power
capabilities of bipolar devices, a prime example be-
ing the UCC3806.
The UCC3806 features slew rate limiting of the cur-
rent sense amplifier input voltage. This allows direct
injection of the primary current sense signal with-
out the need to filter the inductive leading edge
spike. The propagation delay from current sense to
output is reduced to 125ns and rise and fall times
of the gate drive outputs are only 65ns. Gate drive
current remains high at
±
500mA from the dual to-
tem pole MOSFET drivers. The low undervoltage
lockout thresholds make this IC ideal for many bat-
tery and automotive applications. Most features will
be familiar to the designer acquainted with the
UC3846. The one volt pulse by pulse current limit-
ing remains, along with programmable latched or
non-latched shutdown modes triggered via the
Shutdown pin.
This Application Note highlights retrofit applications
of the UCC3806 and provides a step by step proc-
ess to accomplish this. Several new applications
will be introduced with a review of some popular
applications. Unitrode Application Note U-93 de-
scribing the UC3846 should be reviewed for back-
ground and additional information.
UCC3806 BiCMOS Current Mode PWM Control
IC Features
•
100µA startup current
•
1.4mA operating current
•
Pin-for-pin compatible with UC3846 and
UC3856
•
Operating frequency to 1MHz
• ±
500mA MOSFET output stage
•
65ns output rise and fall times
•
125ns current amp to output delay
•
Current Sense Slew Rate Limiting
•
Undervoltage Lockout
DEVICE DIFFERENCES
For designers familiar with the UC3846 or UC3856
devices, this section will provide a quick overview
of necessary design changes to incorporate the
UCC3806.
1)
UVLO:
Three parameters should be observed
here. The start up voltage threshold is 8.0V with an
operating hysteresis of 0.75V. The absolute maxi-
mum voltage for V
IN
(pin 15, IC power) is 15V and
for V
C
(pin 13, gate drive voltage), 18V.
2)
DEAD TIME
(t
d
) is determined by the timing ca-
pacitor (C
T
).
t
d
= 961C
T
(approximately)
APPLICATION NOTE
U-144
UCC1806 Block Diagram
3)
SWITCHING FREQUENCY
(f
s
) may be found
supply and another for the FET drive outputs. In
by using the equation
either case, adequate local capacitive bypassing is
required. The IC supply voltage is internally limited
1
f
s
=
by a 15 volt shunt regulator circuit. This is advanta-
2
R
T
C
T
+
t
d
geous in off-line applications where the IC is pow-
ered-up by a resistor to the high voltage input.
4)
SHUTDOWN
threshold voltage on pin 16 has
Shunted supply current in the IC must be limited to
been raised to 1.0V.
10mA maximum. The IC’s ground should be sepa-
5)
GATE DRIVES:
The maximum gate drive cur-
rated from any high current or noisy ground paths,
rent is
±
500mA.
but at the same electrical potential. This is best
6)
CURRENT LIMIT:
As in the UC3846 and
done by routing a local ground for the UCC3806
UC3856, R1 and R2 (see Figure 5) program the
circuitry and then connecting this to a single point
threshold for primary current limit and determine
system ground.
whether the IC will latch off or retry. When a shut-
down signal is generated, a 190µA current source
to ground pulls down on pin 1. If the voltage on the
current limit adjust pin (pin 1) remains above
350mV the IC will remain latched and power must
be cycled to restart. If the voltage on the current
limit adjust pin falls below 350mV, then the IC will
attempt a re-start.
DESCRIPTION
SUPPLYING POWER
Power can be applied to the UCC3806 by a single
source or by two separate sources, one for the IC
Figure 1. Supplying Power
2
APPLICATION NOTE
UNDER VOLTAGE LOCKOUT (UVLO)
A minimum of 8V is needed to start the UCC3806,
and once operational, the IC operates down to
7.25V. Below this level the UCC3806 will turn off
and again require at least 8V to re-start. Care must
be taken to be sure that the voltage source can
supply adequate current to maintain operation or
the IC will cross its turn-off undervoltage lockout
threshold and shut down. The most obvious symp-
tom where this problem occurs is when the entire
power supply pulses on and off. Depending on the
storage capacitor size and bias supply circuitry, the
supply may eventually continue to run or may sim-
ply hiccup. A good design will include a large ca-
pacitor across the IC power inputs to store energy
long enough to avoid UVLO. Note that the gate
drive requirements of most power MOSFETs will
usually use more current than the IC draws by it-
self, and must not be overlooked. Please refer to
application note U-93 and U-137 for more details.
SELF-BIASING, ACTIVE LOW OUTPUTS DUR-
ING UNDER VOLTAGE LOCKOUT.
During any undervoltage lockout the UCC3806 out-
puts are actively held low to eliminate problems
caused by a power MOSFET switch device inad-
vertently turning on. As with other Unitrode PWM
IC’s, gate drive outputs cannot pull high until the IC
has been properly turned on. This self-biasing cir-
cuitry derives its power from the MOSFET gate
voltage which is attempting to rise. Note that this
protection feature is also activated when the supply
voltage falls below the UVLO point, causing the IC
to turn off.
REFERENCE VOLTAGE
The UCC3806 provides a 5.1V
±
1% reference out-
put. Bypass capacitors with low impedance (ESL
and ESR) and good high frequency response
should be used. Generally, a ceramic monolithic or
MLC capacitor with short leads to the IC ground
pin is required even if the reference is not exter-
nally used. Note that the maximum current avail-
able from the reference pin is 10mA. Erratic
operation can be caused by exceeding the maxi-
mum current or from connecting very noisy loads
to the V
REF
pin without adequate bypassing and fil-
tering.
OSCILLATOR
The oscillator timing section of the UCC3806 is
similar to it’s predecessors yet uses different volt-
age thresholds throughout. Frequency is pro-
grammed by selecting the values of two timing
components; C
T
, the timing capacitor and R
T
, the
timing resistor. Current flowing from the internal
1.25V reference at the R
T
pin divided by the value
of R
T
is mirrored to the timing capacitor pin (C
T
).
U-144
This causes a linear charging of C
T
from 0V to
2.5V, the lower and upper oscillator thresholds.
Note that the current mirror is limited to a maxi-
mum of 100µA so R
T
must be greater than 12.5k.
Oscillator discharge is facilitated by switching on a
2.6mA current sink from C
T
to ground. This causes
a linear discharge of C
T
to zero and then initiates
the next switching cycle. Dead time occurs during
the discharge time of the capacitor during which
time both outputs are active low. Subjecting other
IC pins to excessive noise or pulling some points
below ground may reset the oscillator or cause pe-
riodic termination. f
s
and t
d
may be approximated
by:
f
s
=
1
2
R
T
C
T
+
t
d
t
d
= 961 C
T
Figure 2. Frequency and Deadtime
Programming
SYNCHRONIZATION
The SYNC pin allows external synchronization of
the UCC3806 to an outside control signal with TTL
compatible thresholds. The oscillator C
T
pin must
be grounded in order to use the SYNC input fea-
ture. The internal clock is reset and a deadtime
generated by applying a voltage greater than 2V
(high) to the SYNC pin. Returning this input to a
voltage less than 0.8V toggles the output flip-flop
and initiates a new switching cycle.
External synchronization may be sourced from the
SYNC pin. The oscillator output goes to the SYNC
pin and affects the outputs as described above. An-
other UCC3806 may be connected to the SYNC
pin in order to match the frequency of the master
device. Other circuits or devices may use the char-
acteristics of the SYNC pin. A high output state is
at least 2.4V with 5mA current sourced and low
output state 0.4V maximum with a 1mA sink.
3
APPLICATION NOTE
OUTPUT DRIVER SECTION
The two UCC3806 alternating outputs consist of to-
tem-pole MOSFET pairs. Duty cycle may be varied
from 0 to 98% where minimum dead time is deter-
mined by the timing capacitor value. Both outputs
use MOS transistor switches with inherent anti par-
allel body diodes to clamp voltage swings to the
supply rails. This may allow operation without the
use of clamp Schottky diodes on each gate drive
as recommended with all bipolar ICs. Drive cur-
rents of
±
500mA peak with rise and fall times of
65ns are typical performance specifications.
CURRENT AMPLIFIER SECTION
Slew rate limiting on the current sense amplifier
output is featured in the UCC3806 device. This al-
lows direct connection to the current sense resistor
or current transformer with minimal filtering. Para-
sitic leading edge inductive spikes can cause false
triggering in most PWM IC’s and thus require sig-
nificant filtering.
As with other current mode PWM’s, the UCC3806
can be configured for a variety of control tech-
niques. The more common examples are peak cur-
rent mode control, direct duty cycle control (voltage
mode), and gaining popularity is average current
mode control. Slope compensation can be added
by dividing down the oscillator sawtooth waveform
and summing a portion of it to the peak switch cur-
rent signal.
High efficiency current sensing can be obtained by
developing a small amplitude current sense signal,
well below the 1 volt maximum of the IC. A DC ped-
estal can be added to raise the current signal,
gaining noise immunity. One easy method of
achieving this is to add resistors from output A and
output B to the positive current sense input in a
system where the negative current sense pin is
grounded. Note that this pedestal will vary with
changes in the IC collector supply voltage, V
C
. An-
other method to add a DC level to the current
U-144
Figure 3B. Level Shifted Shutdown
Figure 3C. Adding a Pedestal from Gate Drives
sense input or the current limit input is to use a re-
sistive divider from V
REF
.
PROTECTION CIRCUITRY
By adjusting the pulse-by-pulse current limiting, a
converter can be protected against short circuit
conditions. The UCC3806 terminates the PWM out-
put protecting the switching device and other
power components when sensed switch current
reaches the 1 volt current limit threshold. The ratio
of this signal to actual switch current is determined
by the current sense resistor value. Additionally, the
Figure 3A. Level Shifted Current Sense
Figure 4. Overcurrent Shutdown
4
APPLICATION NOTE
SHUTDOWN feature can be incorporated for fur-
ther protection as shown in Figure 4.
The pulse-by-pulse current sense amplifier allows
differential voltage sensing for ungrounded sense
resistors. The current amplifier will terminate the
ON-time when it’s differential voltage reaches that
set at the current limit input. Pulse by pulse current
limiting is programmed by two resistors at the cur-
rent limit. These resistors also set the shutdown
mode to either latching or non-latching shutdown.
To choose Values of R1 and R2:
V
CS
= (V
pin1
−
0.5)/3

R
2
•
V
REF
I
CL
=

 −
0.5
 ⁄
3R
S

R
1
+
R
2
During Shutdown:
SOFT START
U-144
Several methods of soft starting of a converter are
possible with the UCC3806, and two common ex-
amples are shown. In the first example, an R/C net-
work isolated by a PNP transistor sinks current
from the output of the error amplifier. In the second,
an R/C network alone is used on the error amplifier
non-inverting (E/A+) input. This ramps up the non-
inverting input of the op-amp to reduce the slew of
output voltages and delivers true closed loop con-
trolled start-up. In both cases, the diode provides
automatic capacitor discharge when the V
REF
turns
off, typical of a power-up or shutdown condition.
V
REF
−
190(10
−
6
)
R
1
V
pin1
=
R
1
1
+
R
2
Latch Mode: V
pin1
> 350mV
Non-Latch Mode: V
pin1
< 350mV
A SHUTDOWN pin is provided for enhanced pro-
tection. Pin 16 can be programmed to force a shut-
down when it’s voltage exceeds 1V, and latching or
non-latching modes are programmable options.
When a shutdown is triggered, a 190µA current
sink is connected to the current limit pin. If the volt-
age on pin 1 remains above 350mV, then the IC re-
mains latched and outputs are held actively low. If
the voltage is allowed to fall below 350mV, then the
IC will reset and initiate a re-start. Of course, a
wider margin is recommended to guarantee that
resistor tolerances and external noise do not affect
this mode selection. Again, a bypass capacitor
from pin 1 to ground can also help eliminate prob-
lems from external noise.
Figure 6. Buffered Soft Start
Figure 7. Closed Loop Soft Start
APPLICATIONS
Push-Pull Converter
One of the most common uses for the UCC3806 is
in an isolated Push-Pull configuration utilizing cur-
rent mode control. A summation of the components
and their functions follows.
Resistors Rg1 and Rg2 limit the output current to
0.5A. Rv limits current to the IC to 10mA. R
T
and
C
T
set frequency and dead time. Note that oscilla-
tor waveforms may become non-linear at higher
frequencies and so R
T
and C
T
should be selected
to obtain the desired frequency. Rss and Css are
used to ramp up the reference on the error amp so
the output voltage comes up in an orderly manner.
R1 and R2 program the pulse by pulse current limit
for primary peak current. R3 and R4 set a shut-
down triggered by excessive primary current.
These levels should be set to assure that a shut-
Figure 5. Shutdown Mode Programming
5

Plik z chomika:

Inne pliki z tego folderu:

Inne foldery tego chomika:

Zgłoś jeśli naruszono regulamin