E1EVOLV3.PDF

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Backward Compatibility
All New Generations are Backward Compatible to Earlier Generations
Dallas Semiconductor
E1 Evolution
100-Pin LQFP
DS21354
Third Generation
E1 Single-Chip
Transceiver
256-BGA MCM
X4
DS21Q354
Quad E1
Transceiver MCM
Highest Density / Lowest Cost
Separate Pin-for-Pin Compatible E1 and T1 Paths Provide Maximum Port
Density and the Lowest Possible Port Cost
44-Pin PLCC
DS2153
First Generation
E1 Single-Chip
Transceiver
(in production)
100-Pin LQFP
3.3V
DS2154
Second Generation
E1 Single-Chip
Transceiver
(in production)
5V
100-Pin LQFP
DS21554
Third Generation
E1 Single-Chip
Transceiver
256-BGA MCM
Completely Integrated
E1 Interface Solution
that Included:
- Long & Short Haul
Line Interface (LIU)
- Framer
- Line Monitor
- Jitter Attenuator
- Dual Elastic Stores
X4
DS21Q554
Quad E1
Transceiver MCM
New Features:
- Crystalless Jitter Attenuation
- Non Multiplexed Bus Option
- Hardware Signaling
- Per-Channel Idle Control
- Automatic NET 5 Alarm Generation
- Expanded Sa Bit Access
- Per-Channel Loopback
New Features:
- 0.6u Die Shrink
- 3.3V Option
- JTAG
- 8Mbps TDM I/F Option
- HDLC Controller (w/ 64 Byte Buffers) Added
- HDLC Can be Used on Sa Bits or DS0 Channels
128-Pin TQFP
128-Pin TQFP
300-BGA MCM
DS21FT44
4 X 3 E1 Framer
MCM
DS21FF44
4 X 4 E1 Framer
MCM
Remove LIU
and Step
Framer 4X
DS21Q43A
First Generation
Quad E1 Framer
(in production)
3.3V
DS21Q44
Second Generation
Quad E1 Framer
X3
X4
Single-Chip Transceiver
Size Comparison
44-Pin
PLCC
(17.5mm x
17.5mm)
May 7, 1998
100-Pin
LQFP
(16mm x
16mm)
256-BGA MCM
(27mm x 27mm)
New Features:
- 0.35u Die Shrink
- 3.3V Only Operation
- Hardware Signaling
- Per-Channel Idle Control
- Automatic NET 5 Alarm Generation
- HDLC Controller (w/ 64 Byte Buffers) Added
- HDLC Can be Used on Sa Bits or DS0 Channels
- Expanded Sa Bit Access
- Per-Channel Loopback
- JTAG
- 8Mbps TDM I/F Option
Quad
Framer
Size
Comparison
128-Pin
TQFP
(16mm x
22mm)
300-BGA MCM
(27mm x 27mm)

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