Zen-V9.pdf

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Zen Variations #9
By Nelson Pass
Introduction
In ZV8 we dipped our toes into the waters of power JFET transistors using the
new Lovoltech LU1014D in a simple circuit. The focus of the project was on the
JFET itself, and except for a cascode transistor the rest of the amplifier used
only passive components. Here in four installments we will increase the
complexity of the circuitry around the JFET with an eye toward distortion
performance surpassing any of the Zen projects to date.
Much of this project will make reference to ZV8 (AudioXpress, January 2006
and
www.passdiy.com),
which discusses the characteristics of the LU1014D
power JFET and the circuit that forms the basis for this project. ZV8 also
brought up the subject of load-line optimization, which we will exploit here,
working the Drain to Source voltage (Vds) curve to reduce distortion.
For your quick reference, the most basic circuit is presented here as Figure 1.
Installment 1 – Supply Filter and Constant Current Source
We bias ZV8 with a pair of light bulbs, whose resistance offers about 11 ohms
and delivers about 2.2 amps to the gain transistor. This has three drawbacks:
1) It is inefficient - the power supply must have about 50% higher voltage
than the amplifier’s peak output.
2) The light bulb resistances parallel the load, so that an 8 ohm load looks
like 4.6 ohms, making the gain device work nearly twice as hard and
raising the distortion.
3) It has poor power supply noise rejection – a portion of the noise in the
power supply comes through the light bulbs to the output.
First, we will put in an active supply filter to reduce power supply noise and turn-
on thump. Then we will replace the light bulbs with a 2 amp constant current
source. It will not glow warmly on cold winter evenings, but it will draw less
current, deliver about 50% more power, and has lower distortion and noise.
Figure 2 shows the replacement of the two light bulbs with the supply filter and
the constant current source. Q4 is set up as a capacitance multiplier whose C3
and R8 time constant is set to 5 seconds. At this charge rate, the circuit will see
minimal supply ripple and have a low turn-on transient. The supply voltage
appearing on the Drain of Q3 enjoys some additional passive filtering from C2
and C6. Q4 drops about 4 volts off the supply, so that a 50V unregulated rail
delivers about 46 volts at the Drain of Q3 (Voltages
in all schematics are
approximate).
We could DC stabilize the supply with zener diodes across C3,
but that would make it more difficult to have such a slow turn-on, so we will use
the constant current source to DC stabilize the bias current.
The constant current source is formed by N channel Mosfet Q3 controlled by
NPN transistor Q5. We make use of the physical constant of the PN junction of
the Base-Emitter voltage of Q5 for a reference, and the circuit works to maintain
about .66 volts across the resistors R4 through R6, which makes for a constant
current of 2 amps. R10 through R13 are there to provide a relatively constant
bias current for the Collector of Q5, with C4 bootstrapping from the output.
There are few other changes to the circuit of Figure 1, but you will note the
addition of an
audiophile-approved
bypass capacitor on the output, and
variability in the value of R3. Later we will see that that this value can be used
to optimize the performance around the characteristics of individual JFETs.
In Figure 2 we trim the value of P1 for a Drain voltage of one-half the supply
voltage by adjusting the Vds of the JFET – if the voltage on the Drain of Q3 is
46 volts, then we want about 23 volts on the Drain of Q2. With the appropriate
value for R3 (approximately 2 ohms) we will see minimum distortion and a Vds
across the JFET Q1 of 2 to 3 volts. This comes out to about 4 to 6 watts
dissipation for the device.
This particular circuit is a transconductance amplifier, that is to say a current
source whose output impedance is mostly determined by the 100 ohm output
resistor R7. To lower the output impedance we will later apply some negative
feedback.
Figure 3 shows the comparative performance of the circuits of Figure 1 and 2,
and we see an immediate distortion reduction by about half. What is less clear
is that the light bulb version is clipping at about 10% distortion at 10 watts, while
the current source circuit clips comparably at about 20 watts.
Installment 2 – Cascode Modulation
In ZV8 we spent some time discussing the triode-like character of the power
JFET at low voltages, where both the transconductance and “plate” (Vds)
characteristics show exponential behaviour. With such a device, you can
exploit distortion cancellation by carefully choosing the load line of operation so
that the variation in gain versus current is cancelled against the gain versus
voltage so that the distortion of the device is dramatically reduced.
This phenomenon was only discussed in ZV8, and here is where we will put it to
use. In many examples, correctly varying the Vds versus Ids (Drain-Source
current) in the JFET would involve more complex circuitry, but on this rare
occasion Mother Nature does us a favor. The optimal voltage variation can be
had across resistors R1 – R3 which are coincidentally close to the value
selected to give the JFET the correct DC self-biased value at 2 amps.
In Figure 2 C5 is placed so that the AC voltage at the Source of Q2 tracks the
Source of Q1, holding the Vds of Q1 at a relatively constant DC value of about 2
to 3 volts. This is classic cascode operation. But a truly constant Vds for Q1 is
not the lowest distortion load line for the device. Because we want to cancel
two nonlinear characteristics, the optimal Vds across Q1 will be DC plus a finite
AC voltage at around -600 mV per amp, which was determined by testing at 1
watt. In figure 4 we achieve this by grounding one leg of C5 - the simplest
change imaginable. Figure 5 shows the difference.

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